Embodiments of the inventive concept described herein relate to a voltage trimming circuit, an operating method thereof, and an integrated circuit including the voltage trimming circuit, and more particularly to a voltage trimming circuit including anti-fuses, an operating method thereof, and an integrated circuit including the voltage trimming circuit.
An integrated circuit may generate internal voltages by using a driving voltage (e.g., VDD). The internal voltages may not be accurately set to desired voltage levels and it may be required to trim or adjust their levels. To trim the internal voltages, a test device (external device of the integrated circuit) may read the internal voltages through a pad(s) of the integrated circuit. A test time may be increased due to the voltage level trimming times which includes a time for the test device to read the internal voltages and a time to control internal circuit in the integrated circuit to trim the internal voltages. The increase in the test time of the integrated circuit may lower the production yield of the integrated circuit.
Also, in the case where the test device adjusts the internal voltages of the integrated circuit, an internal voltage may fail to be set to a reference voltage or a target voltage accurately due to unique resolution of the test device. In particular, it may be important to set an internal voltage more accurately because a driving voltage is reduced as the integrated circuit is finely manufactured.
For solving the problems mentioned above, a voltage trimming circuit is suggested to adjust an internal voltage of an integrated circuit internally.